CircuitRC.vhd
2.23 KB
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library IEEE;
use IEEE.electrical_systems.all;
---------------- ENTITY DECLARATION Resistor ----------------
-- @Req1.1 'Requirement2' : The system shall be capable to have a derivator behavior
ENTITY Resistor IS
GENERIC(
R : real
);
PORT(
TERMINAL m : Electrical;
TERMINAL p : Electrical
);
END ENTITY Resistor;
---------------- ARCHITECTURE DECLARATION behav OF Resistor ----------------
ARCHITECTURE behav OF Resistor IS
QUANTITY v_in ACROSS i_out THROUGH p TO m;
BEGIN
v_in == R * i_out;
END ARCHITECTURE behav;
library IEEE;
use IEEE.electrical_systems.all;
---------------- ENTITY DECLARATION Condensateur ----------------
-- @Req1.2 'Requirement3' : The system shall be capable to respond in 2ms
ENTITY Condensateur IS
GENERIC(
C : real
);
PORT(
TERMINAL m : Electrical;
TERMINAL p : Electrical
);
END ENTITY Condensateur;
---------------- ARCHITECTURE DECLARATION behav OF Condensateur ----------------
ARCHITECTURE behav OF Condensateur IS
QUANTITY v_in ACROSS i_out THROUGH p TO m;
BEGIN
i_out == C * v_in'dot;
END ARCHITECTURE behav;
library IEEE;
use IEEE.electrical_systems.all;
---------------- ENTITY DECLARATION Generateur ----------------
ENTITY Generateur IS
PORT(
TERMINAL m : Electrical;
TERMINAL p : Electrical
);
END ENTITY Generateur;
---------------- ARCHITECTURE DECLARATION behav OF Generateur ----------------
ARCHITECTURE behav OF Generateur IS
CONSTANT v : real := 110.0;
QUANTITY v_in ACROSS i_out THROUGH p TO m;
BEGIN
v_in == v;
END ARCHITECTURE behav;
library IEEE;
use IEEE.electrical_systems.all;
library work;
use work.ALL;
---------------- ENTITY DECLARATION Circuit ----------------
-- @Req1.0 'Requirement1' : The system shall be capable to do a low-pass band filter
ENTITY Circuit IS
END ENTITY Circuit;
---------------- ARCHITECTURE DECLARATION behav OF Circuit ----------------
ARCHITECTURE behav OF Circuit IS
TERMINAL n1 : Electrical;
TERMINAL n2 : Electrical;
BEGIN
R1 : ENTITY Resistor (behav)
GENERIC MAP (R=>100.0)
PORT MAP (p=>n1, m=>n2);
C1 : ENTITY Condensateur (behav)
GENERIC MAP (C=>1.0e-6)
PORT MAP (p=>n2, m=>ground);
SRC : ENTITY Generateur (behav)
PORT MAP (p=>n1, m=>ground);
END ARCHITECTURE behav;