hydra-eclipse / sysml2vhdlams

Blame view

fr.femtost.disc.eclipse.sysml2vhdlams.atl/test/FlowPort2MinusTerminalTest/expected.vhdlams 1.13 KB
edit raw normal view history
f902ce56c   Jean-Marie Gauthier   Commit of projects 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
 
  <?xml version="1.0" encoding="ISO-8859-1"?>
  <vhdlams:VAModel xmi:version="2.0" xmlns:xmi="http://www.omg.org/XMI" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:vhdlams="http://www.femto-st.fr/disc/vhdlams.ecore" name="source">
    <package name="source">
      <designUnit xsi:type="vhdlams:Entity" name="Block1" architecture="//@package.0/@designUnit.1"/>
      <designUnit xsi:type="vhdlams:Architecture" name="behav" entity="//@package.0/@designUnit.0">
        <statement xsi:type="vhdlams:ComponentInstanciation" name="block2" type="//@package.0/@designUnit.2" architecture="//@package.0/@designUnit.3"/>
      </designUnit>
      <designUnit xsi:type="vhdlams:Entity" name="Block2" architecture="//@package.0/@designUnit.3">
        <property xsi:type="vhdlams:Terminal" name="m">
          <type href="../../../fr.femtost.disc.eclipse.vhdlamslibrary/library/ieee.vhdl.xmi#//@designUnit.7/@designUnit.12"/>
        </property>
      </designUnit>
      <designUnit xsi:type="vhdlams:Architecture" name="behav" entity="//@package.0/@designUnit.2"/>
    </package>
    <library name="IEEE">
      <use name="electrical_systems"/>
    </library>
  </vhdlams:VAModel>